Paper Details

Communicating Process Architectures (CPA)
 Title: Rigorous Timing, Static OCCAM, and Classic CSP: Formal Verification for the Internet of Things
 Conference: Communicating Process Architectures 2017
 Authors: Lawrence J. Dicksona, Jeremy M. R. Martinb
(a) Space Sciences Corporation
(b) ITG Application Group, Lloyd's
 Abstract: Classic CSP is a "model without time" and yet contains time sequence and even a "time-out" or "sliding choice" operator (Roscoe, The Theory and Practice of Concurrency, 2005, p 80). The static occam language and the Transputer processor, both based on finite CSP, have time and other structure that make them a deliberate refinement of classic CSP; but occam is imperative and capable of doing completely general computing tasks. Programs written in occam and run on the Transputer can be proven correct and their behavior characterized down to cycle count. Classic CSP process descriptions of these same programs can also be investigated and proven using CSP techniques, including hiding. This Fringe presentation, the first of a pair, will introduce these two approaches, using calculated assembly-code response of two-priority T2, T4, or T8 Transputers. We will begin with the n-process raw FIFO and the two-process store/shelf FIFO detailed in author Dickson’s book Crawl-Space Computing (pp. 111-120), using variable timing patterns for external communication. The true timing will be used to make sense of the abstract model of CSP in the real world, with and without hiding of internal channels. The purpose of the investigation is to illuminate how rigorous conclusions can be drawn with a combination of CSP, occam-to-occam mappings, timing and sequence requirements. As time permits, we will expand the conclusions reached to IoT designs capable of serving multiple external communications and doing content calculations, treated as low-priority, time-consuming and nondeterministic. 
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