Paper Details

Communicating Process Architectures (CPA)
 Title: VHDL Generation From Python Synchronous Message Exchange Networks
 Conference: Communicating Process Architectures 2016
 Authors: Truls Asheim, Kenneth Skovhede, Brian Vinter
Niels Bohr Institute, University of Copenhagen
 Abstract: The Synchronous Message Exchange, SME, is a programming model that both resembles communication in hardware, and can be implemented as a CSP network. This paper extends on previous work for modeling hardware-like programs using SME in Python, with the addition of a source-to-source compiler that converts an SME network implemented in Python to an equivalent implementation in VHDL. We describe the challenges, constraints, and solutions involved in translating a highly dynamical language like Python into the hardware-like VHDL language. We also show how the approach can assist in further VHDL refinement by generating tedious test bench code, such that VHDL designs can be simulated and verified with vendor supplied simulation and synthesis tools. 
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